The present invention relates to a programmable controller. More specifically, this invention relates to an arithmetic circuit which processes a sequence program with high speed in a programmable controller.
A conventional programmable controller will be explained with reference to FIG. 21. FIG. 21 shows a structure of the programmable controller disclosed in Japanese Patent Laid-open Publication No. HEI 5-204416. This programmable controller has a sequence program memory 100 which stores a sequence program therein, an arithmetic circuit 101 for the sequence program, a data memory 102 which stores arithmetic data therein, and a microprocessor 103 which processes an instruction which cannot be executed in the arithmetic circuit 101.
The arithmetic circuit 101 has an instruction decode section 104, a conductive/non-conductive information storage section 105, an arithmetic data storage section 106, an arithmetic section 107, an address generation section 108 and a control section 109. The instruction decode section 104 decodes instruction codes of the sequence program stored in the sequence program memory 100. The conductive/non-conductive information storage section 105 stores a state of a contact point of the last sequence program. The arithmetic data storage section 106 temporarily stores data to be operated. The arithmetic section 107 executes a bit process and a word process 11 according to contents of the instruction codes. The address generation section 108 generates an address for the data memory 102. The control section 109 make controls when the arithmetic data are read from the data memory 102 into the arithmetic circuit 101 and an arithmetic result of the arithmetic section 107 is written into the data memory 102 and the 1.15 conductive/non-conductive information storage section 105.
Operation of the arithmetic circuit 101 will now be explained. When an instruction which can be processed in the arithmetic circuit 101 is executed, and if the instruction decode section 104 recognizes that data read from the sequence program memory 100 are the instruction which can be processed in the arithmetic circuit 101, the arithmetic section 107 executes an arithmetic process according to the decoded content, and the arithmetic result is stored in the conductive/non-conductive information storage section 105 or the data memory 102. The data to be operated at this time include the data read from the data memory 102 into the arithmetic data storage section 106, the data stored in the conductive/non-conductive information storage section 105 and the data stored in respective registers in the arithmetic circuit 101. When the arithmetic result is stored in the conductive/non-conductive storage section 105, the data in the data memory 102 are held as conductive/non-conductive information, and the next instruction uses the conductive/non-conductive information. Meanwhile, when the arithmetic result is stored in the data memory 102, when the conductive/non-conductive information becomes conductive, the arithmetic result in the arithmetic section 107 is held in the data memory 102.
Operation, when an instruction which cannot be executed in the arithmetic circuit 101, will now be explained. When the instruction decode section 104 recognizes the instruction which cannot be processed in the arithmetic circuit 101, the instruction decode section 104 actuates the microprocessor 103. When the microprocessor 103 is actuated, the microprocessor 103 reads the arithmetic data from the data memory 102 and executes arithmetic, and writes the arithmetic result into the conductive/non-conductive information storage section 105 or the data memory 102. Moreover, as for an instruction which is operated after judging as to whether or not it is executed at the last scanning, or an instruction which is operated after judging a state of an applicable bit in the data memory 102 at the last execution, the last execution/non-execution information is stored in an applicable bit in the sequence program, for example, and the process of the instruction is completed.
Operation of the conventional programmable controller when it executes the sequence program concretely shown in FIG. 22 will now be explained. In FIG. 22, 110 is an instruction (symbol) for storing a state of bit data X0 stored in the data memory 102 into the conductive/non-conductive information storage section 105. 111 is an instruction (symbol) for storing AND of a state of bit data X1 stored in the data memory 102 and conductive/non-conductive information about a contact point stored in the conductive/non-conductive information storage section 105 by an instruction 110 into the conductive/non-conductive information storage section 105. 112 is an instruction (symbol) for obtaining AND of a compared result of the work data D0 and D1 stored in the data memory 102 and the conductive/non-conductive information stored by the instruction 110 so as to store the AND into the conductive/non-conductive information storage section 105. 113 is an instruction (symbol) for transmitting word data D2 stored in the data memory 102 as a content of D3 when the last data in the conductive/non-conductive information storage section 105 are ON and not transmitting D2 when the last data are OFF. 114 is an instruction (symbol) for storing an added result of word data D4 and D5 stored in the data memory 102 as a content of D6 when the last data in the conductive/non-conductive information storage section 105 are ON, and not storing the added result when the last data are OFF.
Instructions 110 to 114 shown in FIG. 22 are stored in the sequence program memory 100 as instruction codes in order, and they are read into the instruction decode section 104 in order. When the instruction 110 is fetched, the control section 109 reads an input device stored in the data memory 102 into the arithmetic data storage section 106, and the arithmetic section 107 bit-extracts an ON/OFF state of X0 and stores it into the conductive/non-conductive information storage section 105.
When the instruction 111 is fetched, the control section 109 reads an input device stored in the data memory 102 into the arithmetic data storage section 106, and the arithmetic section 107 bit-extracts the ON/OFF state of X0 so as to store AND of the bit-extracted result and data in the conductive/non-conductive information storage section 105 as conductive/non-conductive information.
When the instruction 112 is fetched, the instruction decode section 104 discriminates that the instruction 112 cannot be executed in the arithmetic section 107. The microprocessor 103 is actuated so as to obtain AND of the compared result of the word data D0 and D1 stored in the data memory 102 and the conductive/non-conductive information stored by the instruction 111 and store the AND into the conductive/non-conductive information storage section 105. When the instruction 113 is fetched, the control section 109 reads D2 and D3 from the data memory 102, and writes the content of D2 into D3 when the conductive/non-conductive information is ON and writes the read content of D3 directly into D3 when the conductive/non-conductive information is OFF.
When the instruction 114 is fetched, the instruction decode section 104 recognizes that the instruction 114 cannot be executed in the arithmetic circuit 101. The microprocessor 103 is actuated so as to add D4 and D5 when the conductive/non-conductive information is ON and write the added result into D6, and so as not to add D4 and D5 when the conductive/non-conductive information is OFF.
In the conventional programmable controller, since the instructions are always discriminated regardless of the state of the conductive/non-conductive information, the instruction processing cycle becomes uniform regardless of execution/non-execution. For this reason, there arises a problem that time for processing the sequence program at the time of non-execution cannot be shortened.
In addition, in the conventional programmable controller, when the data arithmetic for double word is executed, an upper address cannot be created for the data memory 102. For this reason, the data arithmetic for double word should be executed in the microprocessor 103 as an instruction which cannot be executed in the arithmetic circuit 101. As a result, there arises a problem that the time for processing the instruction becomes longer.
In addition, in the conventional programmable controller, since means for writing as to whether or not an instruction is executed at the last scanning is not provided, an instruction which uses execution/non-execution information at the last scanning should be inevitably executed in the microprocessor 103. As a result, there arises a problem that the time for processing the instruction becomes longer.
Therefore, it is an object of the present invention to provide a programmable controller which enables shortening of the time for processing a sequence program at the time of non-execution, enables data arithmetic for double word in an arithmetic circuit and an instruction process using execution/non-execution information at the last scanning, and processes the sequence program with high speed.
The present invention can provide a programmable controller having a sequence program memory for storing a sequence program, a data memory for storing arithmetic data, an instruction decode section for analyzing instruction codes of the sequence program memory, a conductive/non-conductive information storage section for storing a state of a contact point of the last sequence program, an arithmetic data storage section for temporarily storing the arithmetic data read from the data memory, a control section for controlling reading/writing for the data memory and controlling the arithmetic data storage section, and an arithmetic section composed of hardware for executing arithmetic according to contents of the instruction codes, that the instruction decode section judges execution/non-execution according to a state of the contact point of the last sequence program stored in the conductive/non-conductive information storage section under an execution condition of an instruction decoded by the instruction decode section, a data memory control section is provided to the control section, and the data memory control section reads arithmetic data from the data memory or the sequence program memory when the execution condition is established and after arithmetic in the arithmetic section, provides control so as to write an arithmetic result into the data memory, and provides control so as not to read/write the arithmetic data between the data memory and said arithmetic section when the execution condition is not established, and does not execute arithmetic when the execution condition is not established so as to proceed to next instruction. Therefore, since the instruction decode section judges execution/non-execution according to the conductive/non-conductive information of the contact point, and the arithmetic data between the data memory and the arithmetic section are not read/written nor operated at the time of non-execution, the processing time at the time of non-execution can be shortened.
In addition, the present invention can provide a programmable controller having a sequence program memory for storing a sequence program, a data memory for storing arithmetic data, an instruction decode section for analyzing instruction codes of the sequence program memory, a conductive/non-conductive information storage section for storing a state of a contact point of the last sequence program, an arithmetic data storage section for temporarily storing arithmetic data read from the data memory, a control section for controlling reading/writing for the data memory and controlling the arithmetic data storage section, an arithmetic section composed of hardware for executing arithmetic according to contents of the instruction codes, that a bit (execution flag bit) for storing existence/non-existence of an instruction at the last scanning is provided in the sequence program memory, the instruction decode section judges execution/non-execution according to a state of the contact point of the last sequence program stored in the conductive/non-conductive information storage section and on/off state of the bit in the sequence program memory under an execution condition of an instruction decoded by the instruction decode section, a data memory control section is provided to the control section, and the data memory control section reads the arithmetic data from the data memory or the sequence program memory when the execution condition is established and after arithmetic in the arithmetic section, provides control so as to write an arithmetic result into the data memory, and provides control so as not to read/write the arithmetic data between the data memory and said arithmetic section when the execution condition is not established, and does not execute arithmetic when the execution condition is not established so as to proceed to next instruction. Therefore, since the instruction decode section judges execution/non-execution according to the conductive/non-conductive information of the contact point and the execution flag bit, and the arithmetic data between the data memory and the arithmetic section are not read/written nor operated at the time of non-execution, the processing time at the time of non-execution can be shortened.
In addition, the present invention can provide a programmable controller, that data of the conductive/non-conductive information storage section are written into the bit in the sequence program memory into which execution/non-execution of an instruction at the last scanning is stored. Therefore, when the conductive/non-conductive information is written into the applicable bit in the sequence program memory so as to be capable of being used for the execution flag at the next scanning, an instruction for executing only scanning that the contact point is on can be processed by the arithmetic section composed of hardware with high speed. As a result, the arithmetic process can be sped up.
In addition, the present invention provides a programmable controller including: an address holding unit for latching an address of the data memory to be accessed in the data memory; and an address generation control unit for incrementing an address latched by the address holding unit so as to generate an address for the data memory when the instruction decode section recognizes instruction codes for executing double word arithmetic, and the execution condition is established and high-order word data are read/written, the address holding unit and the address generation control unit reading/writing the double word data into the data memory. Therefore, the instruction of double word can be processed by the arithmetic section composed of hardware with high speed, and the arithmetic process can be sped up.
In addition, the present invention provides a programmable controller that the arithmetic section has a comparator, when the execution condition is established, after the data memory control section reads the arithmetic data from the data memory or the sequence program memory and the comparator in the arithmetic section execute comparison arithmetic, the data memory control section provides control so as to write the arithmetic result into said data memory, and when the execution condition is not established, the data memory control section provides control so as not to read/write the arithmetic data between the data memory and the arithmetic section, and when the execution condition is not established, the data memory control section does not execute the comparison arithmetic by means of the comparator of the arithmetic section so as to proceed to next instruction. Therefore, in an instruction for storing the arithmetic result into the conductive/non-conductive information storage section, before the comparison arithmetic is executed under the execution condition of the instruction, the execution/non-execution is judged. Since in the case of non-execution of the instruction, the comparison arithmetic is not executed, the processing time at the time of non-execution can be shortened.
In addition, the present invention provides a programmable controller that instruction codes, which are composed of a combination of an instruction for reading the arithmetic data from the data memory or an instruction for reading contents of the sequence program memory and an instruction showing arithmetic, are stored in the sequence program memory, the arithmetic data storage section has a data storage-use register for storing the arithmetic data read from the data memory and a stack pointer showing a register address in which the arithmetic data are stored, the control section has a stack pointer control section which stores the arithmetic data into the data storage-use register and increments the stack pointer when the instruction for reading the arithmetic data or the instruction for reading the contents of the sequence program memory is executed, and decrements the stack pointer when the instruction showing arithmetic is executed so as to read the data from the data storage-use register, and initializes the stack pointer at the time of processing the instruction showing arithmetic when the execution condition is not established. Therefore, when the execution condition is not established, only the stack pointer is initialized at the time of processing the instruction showing the arithmetic. As a result, the processing time can be shortened.
In addition, the present invention provides a programmable controller that a bit (execution flag bit) for storing execution/non-execution of an instruction at the last scanning is provided in the sequence program memory for storing the sequence program, logical arithmetic between on/off state of a bit read from the data memory and on/off state of the bit into which execution/non-execution of the instruction at the last scanning is stored is executed, and the arithmetic result is written into the conductive/non-conductive information storage section. Therefore, since the states of bit devices at the last scanning are written into the execution flag bit of the sequence program memory, the instruction for executing only scanning that the bit devices change can be processed by the arithmetic section composed of hardware with high speed. As a result, the arithmetic process can be sped up.
In addition, the present invention provides a programmable controller that the on/off state of the bit read from said data memory is stored into the bit (execution flag bit) in the sequence program memory into which execution/non-execution of the instruction at the last scanning. Therefore, the on/off state of the bit read from the data memory is written into the bit (execution flag bit) in the sequence program memory into which execution/non-execution of the instruction at the last scanning is stored. The instruction for executing only scanning that the bit device changes can be processed by the arithmetic section composed of hardware with high speed. As a result, the arithmetic process can be sped up.
In addition, the present invention provides a programmable controller that a bit for storing execution/non-execution of an instruction at the last scanning is provided in the sequence program memory into which the sequence program is stored, logic arithmetic between on/off state of the contact point of the last sequence program stored in the conductive/non-conductive information storage section and on/off state of a bit into which execution/non-execution of an instruction at the last scanning is stored is executed, and the arithmetic result is written into the conductive/non-conductive information storage section. Therefore, since the conductive/non-conductive information is written into the applicable bit in the sequence program memory so as to be capable of being used for the execution flag bit at the next scanning, the instruction for executing only scanning the contact point is on can be processed by the arithmetic section composed of hardware with high speed. As a result, arithmetic process can be sped up.
In addition, the present invention provides a programmable controller including a register for saving data of the conductive/non-conductive information storage section, the data saved in the register being written into the bit in the sequence program memory into which execution/non-execution of the instruction at the last scanning is stored. Therefore, the conductive/non-conductive information saved in the register can be written into the bit in the sequence program memory into which execution/non-execution of the instruction at the last scanning is stored. The instruction for executing only scanning that the contact point is on can be processed by the arithmetic section composed of hardware with high speed. As a result, the arithmetic process can be sped up.